This position is for an Intel Contract Employee.
This opportunity is for an IP Logic Design Engineer as an Intel Contract Employee with the Soft IP Team- part of the Platform Engineering Group .
Responsibilities include but are not limited to: creating the verification plan for the assigned IP sub-blocks/feature, writing tests, debug and running regressions. Enhancing of the verification environment for scalability and modularity of various features.
You will work on filing HSDs, you will also be working with Design and verification team to find, rootcause and fix the issues, covering and generating reports and analysis .Qualifications: Minimum Qualifications:
- Candidate should possess a Bachelor's in Electrical Engineering or Computer Science with 6 years and/or a Master's degree in Electrical Engineering or Computer Science or similar degree with 4 years of VLSI Front-end experience.
- Extensive knowledge of System Verilog and working knowledge of verification methodologies like OVM and UVM.
- Good knowledge on functional and code coverage
- Adept in programming and/or scripting (C , Perl* and others) and be conversant with flows and tools for VLSI logic design and/or functional verification
- Excellent written and verbal communication skills
- Sound understanding of logic design fundamentals encompassing state machine verification, complex protocol verification, functional test strategies, directed and stress test generation, verification infrastructures and verification and/or debug flows
A little about us:
Our vision is simple and direct. If it computes, it does it best with Intel. We embrace all aspects of computing.