IBM is seeking a Semiconductor Memory Circuit Layout Engineer to work at its Essex Junction, VT location.
Candidate will be involved with the development of test sites and product designs, resident with the Magnetoresistive random-access memory (MRAM) design team. The candidate should have a minimum of 5 years of memory industry design experience in the following areas:
• Full chip integration for memory chips and ADM's
• Full chip DRC verification
• Full chip LVS verification
• Define full chip signal routing methodology
• Define full chip voltage grids and power distribution
• Voltage and reference decoupling cap methodologies that work with signal, power, and fill requirements
• Floor plans of entire chips as well as subsystems
• Expert layout of logic, analogy, and hierarchical systems
• Mastery of industry standard physical design and layout tools
Bachelor's degree in Electrical Engineering or a related area is required.
The World is Our Laboratory: No matter where discovery takes place, IBM researchers push the boundaries of science, technology and business to make the world work better. IBM Research is a global community of forward-thinkers working towards a common goal: progress.
A little about us:
IBM is the world’s largest information technology company with more than 360,000 employees serving clients in 170 countries.