Network Processor Design/Verification Engineer
Location:
Allentown , Pennsylvania
Posted:
January 12, 2017
Reference:
811285
Job Description

You will be responsible for the pre-silicon verification of digital functions, multi-block functions and full chip within our multi-core network processors which are targeted at service provider wire-line and wireless access and enterprise systems.

Specific responsibilities include but not limited

  • Working with senior engineers develop verification specifications for Axxia networking and switching functions.
  • Implement the System Verilog/OVM based verification test bench blocks and tests for these functional blocks.
  • Collaborate with other verification and design team members in the development of functional specifications, test plans, and work to debug test failures.
  • Own and drive development of re-usable verification IP functions.

The ideal candidate enjoys working in a team environment, has a basic understanding of digital/RTL design, and system verilog verification to support a rapid RTL design methodology. Candidate must have strong problem analysis. The position requires attention to detail and ability to learn quickly. A well-rounded candidate will also be able to execute full cycle design or verification from specification authoring, block or testbench implementation and debugging.
Qualifications:

Minimum requirements:

  • BS or MS in Computer Engineering, Electrical Engineering or related field
  • Digital Logic Design and/or Verification experience. Familiarity with digital logic design concepts and techniques.
  • Minimum 6 months of project experience developing and testing digital logic and RTL based designs using industry standard tools and methods.
  • Minimum 3 months of knowledge of lint, clock crossing, synthesis tools in addition to System Verilog verification techniques.
  • Candidate should be familiar basic programming with languages such as C, Linux shell scripting, Perl, TCL.
Preferred:
  • Experience with the development of object oriented reusable verification IP, familiarity with OVM/UVM.
  • Demonstrated success on design projects
  • Familiar with data networking concepts. E.g TCP/IP, Ethernet, IPSec, etc. knowledge at the packet level.



A little about us:
Our vision is simple and direct. If it computes, it does it best with Intel. We embrace all aspects of computing.

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