Principal FPGA Hardware Engineer
Location:
Salt Lake City , Utah
Posted:
April 02, 2017
Reference:
4449161220/2-en-us

DePuy Synthes, a member of Johnson & Johnson's Family of Companies, is recruiting for a Principal FPGA Hardware Engineer to be located in Salt Lake City, UT or Raynham, MA.


DePuy Synthes Companies of Johnson & Johnson is the largest, most innovative and comprehensive orthopaedic and neurological business in the world. DePuy Synthes Companies will offer an unparalleled breadth and depth of products, services and programs in the areas of joint reconstruction, trauma, spine, sports medicine, neurological, craniomaxillofacial, power tools and biomaterials. Building on the legacy and strengths of two great companies, we are creating one organization that will be agile and better equipped in today's evolving health care environment. With a focus on activating insights to develop innovative, comprehensive solutions, we are inspired to advance patient care in greater ways than either company could accomplish on its own.

For Spine this represents an excellent opportunity for a candidate who is excited by building transformational surgical capabilities within neuro-orthopedics, working in a Cross- functional environment of leadership across the franchise and the sector globally.   

 
  • This position holds accountability for our critical enabling technology programs, and will work closely with our internal R&D teams and with external development partners as well. 
  • This role represents the opportunity to shape the R&D function and to help build critical new capabilities in Spine and Global Orthopedics.
  • Ultimately this technical leader is responsible for projects from conception through final execution, partnering with other core development teams to integrate enabling technologies across a broad array of surgical and interventional spine solutions.
  • He or she will design and implement project strategies, be a leader with any outside co-developers, lead and execute R&D projects and will report to the Group Manager of R&D for Spine.

Qualifications
  • A minimum of a Bachelor’s degree in Engineering or related discipline along with 10 years of relevant experience or an advanced Degree within Engineering or related discipline along with 8 years of relevant experience is required to be considered for this role.  
  • Strong background in FPGA or other configurable hardware is required. 
  • Understanding of digital signal processing is required with an emphasis in image signal processing pipelines preferred.
  • Skilled in the following FPGA or other configurable hardware design, PCB Schematic Layout and Assembly, VHDL or Verilog, Hard or Soft core RISC processors, the Altera NIOS II is preferred.
  • Experience working with Altera Quartus or Xilinx ISE or equivalent design software, Analog or Digital simulation,  C/C++, Hardware driver development is preferred.
  • Deep knowledge of HD/UHD Video Processing, PCIe, ISP(Image Signal Processing) is preferred
  • Detailed knowledge of embedded software design using ANSI-C from initial concept through commercial deployment is required.
  • Regulated industry experience is preferred.
  • Strong understanding of image signal processing, processing blocks, Graphical User Interfaces (GUIs), User Interfax (UX) design, On-Screen Display (OSD) is preferred.
  • Deep knowledge of device-to-device communication protocols, HL7 brokers, DICOM imaging, PACS, NIOS II, Quartus, Altera, Xilinx, Windows, Linux, JIRA, SVN, DisplayPort, DVI, HDMI, UART, I2C, SPI, PCIe, Post Script Printer drivers, WiFi Networks, Bluetooth, Object Oriented Programming, Agile Programming techniques, Python, XML, Shell scripts, Makefile, remote device upgrades is preferred.
  • Willingness to work using predefined coding standards and software architecture frameworks is required.
  • Ability to explain (both written and verbal) complex technical issues to quality engineers, marketers, and technical writers is required.
  • Knowledge of designing and implementing White Balance, Color Correction, Enhancement/Sharpening, Gamma, YCbCr conversion, RGB, SMPTE, BT.709, Color Bars, Pixel Offset, Black Level Correction, Pixel Reorder, Pixel Clock, Signal Timing, DDR2/DDR3 Memory Management, processing blocks is preferred.
  • Knowledge of Minimally Invasive Surgery (MIS) imaging through rigid or flexible endoscopes as well as illumination sources such as halogen, xenon, and LED is preferred.
  • Experience within in R&D delivering solutions with complex system components and architecture is preferred.
  • Working within a cross functional landscape, following a product through the entire design cycle is required.
  • Demonstrated experience in a start- up type culture working in a fast pace, small nimble team environment is preferred
  • This position is located in Salt Lake City, UT or Raynham, MA and will require up to 30%  travel domestic and internationally. Willingness to work with cadavers and attend live surgeries is required.
 

Primary Location
United States-Massachusetts-Raynham
Other Locations
North America-United States-Utah-Salt Lake City
Organization
DePuySynthes Products Inc (6149)
Job Function
R&D Engineering (R&D)
Requisition ID
4449161220

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