Senior Manager Design Verification

Senior Manager Design Verification
Job Description
The Scalable Performance CPU Development Group (SDG) is searching for an energetic and passionate leader who is ready to drive and grow with a team of IP and SoC verification/validation engineers.
We are looking for someone who has passion around improving the way we solve complex problems through the work of the team as wells as their own direct contributions.
Working experiences digging in deep on technical challenges, empowering a team to succeed, and fostering the career development of the employees entrusted to you.
You also understand that relationships form with other peers, teams, and organizations is key to success in IP and SoC development.

Direct Responsibilities:Oversees:
  • Definition of verification/validation environment, and documentation for IP, SoC System on a Chip and system level development.
  • Determines architecture for validation for chip and system simulation/emulation. Defines module interfaces/formats for simulation.
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
  • Performs all aspects of the SoC design flow from high-level design to verification and system validation, to create a design database that is ready for manufacturing.
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
  • Review/Manage vendor relationships to support development.

The ideal candidate will be able to demonstrate the following behaviors:
  • Ability to work effectively with both internal and external teams/customers is expected.
  • Ability to mentor other engineers and technically guide them.
  • Experience with silicon which include processor cores and custom logic working together.
  • Strong problem solving/leadership skills
  • Strong written and verbal communication skills
  • Capable of building a high performing team, including selection, development and deselection, to deliver the results required from the organization.
  • Facilitator of direct and open communication, diversity of opinion, and debate.


Minimum Requirements: BS degree in Electrical Engineering, Computer Engineering or other related field of study with a minimum of 15 years of relevant experience in SOC/system design/verification OR MS degree with 10 years OR PHD with 8 years of directly related experience with SOC Validation Industry Experience. Candidates must have the following: Proven expertise in Silicon and FPGA based product development. Extensive experience with creating verification environments from scratch for verification of Soc/System level test execution. The ability to work as an individual and as part of a team to deliver a product starting from the creation of the spec, design, verification, and finally to productization. Expertise in dealing and validating with complex IPs from different sources onto the same piece of silicon or FPGA.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel's next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

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