System Validation Engineer
Santa Clara , California
January 12, 2017
You will be a part of server validation team in the Xeon Phi family. You will have an opportunity to plan validation strategy, develop test content, debug and identify root-cause of various issues in emulation and post-silicon environment. This role requires close collaboration with design/architecture/pre-si/firmware and other teams to understand technical features and debug s/w and h/w issues. You will find ample opportunities to learn, lead others and grow your technical expertise in this team.

You must possess a Bachelor of Science degree in Electrical Engineering and/or Computer Science with 2 years of relevant post-si validation experience
- Knowledge of Computer System Architecture
- Understanding of a subsystem HW/SW stack, including the silicon, all onboard HW components and connectors and devices, drivers, and applications
- Experience with C and/or C programming, Python
- Ability to independently read specifications, identify interesting test cases, document them, and implement them
- Experience with debug of Intel chipsets and/or CPUs
- Knowledge of and experience with logic analyzers, oscilloscopes, protocol analyzers, in-target probes(ITP) and Lauterbach (LTB)
- Excellent technical and problem solving skills
- A team player with good organizational and/or planning skills and solid verbal and/or written communication skills
- Highly motivated, curious, and have good lab skills (proper tool use, detailed note taking), and be keenly interested in finding and resolving silicon failures

A little about us:
Our vision is simple and direct. If it computes, it does it best with Intel. We embrace all aspects of computing.

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