Validation Architect
Santa Clara , California
January 12, 2017
Job Description: As a Validation Architect, the candidate will lead and set direction for an experienced validation team in developing and validating new technology for the Xeon-Phi segment. Some responsibilities include:
- Setting end to end validation strategies and methodologies at silicon and platform level
- Defining requirements to enable world-class validation content
- Consulting architecture teams on validation impacts, DFx hook definition, etc.
- Making regular report outs to program-level forums such Mission Control
- Providing quantitative as well as qualitative input to all tape-in and tape-out decisions
- Driving continuous improvement via bug/coverage analysis, arch reviews, customer interactions
- Engaging as necessary on critical debug and firefighting efforts from pre-silicon to launch
- Collaborating with business units on Validation, Quality, TTM initiatives
- Developing and strengthening technical leaders across the organization
- Ensuring consistency, reuse and teamwork across server teams
MS degree in Electrical Engineering, Computer Engineering or Computer Science
10 years of experience in validation, debugging across multiple products
Prior industry experience in leading team of engineers
Knowledgeable of Server technologies and their validation methodologies
Knowledgeable of PC architecture and Intel chipset
Passion for validation and the value it brings to the company
Strong communication and influencing skills, along with ability to work with diverse communities
Strong leadership skills with commitment to team results
Good planning skills & strong ability to multi-task

A little about us:
Our vision is simple and direct. If it computes, it does it best with Intel. We embrace all aspects of computing.

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